ROMAINE, JAMES BRIAN, Delgado-Restituto, Manuel , Antonio Lenero-Bardallo, Juan , Rodriguez-Vazquez, Angel , IEEE

Si

2016 12th Conference On Ph.D. Research In Microelectronics And Electronics (prime)

Proceedings Paper

Científica

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01/01/2016

000390689500072

This paper reports a low area, low power, integer-based neural digital processor for the calculation of phase synchronization between two neural signals. The processor calculates the phase-frequency content of a signal by identifying the specific time periods associated with two consecutive minima. The simplicity of this phase-frequency content identifier allows for the digital processor to utilize only basic digital blocks, such as registers, counters, adders and subtractors, without incorporating any complex multiplication and or division algorithms. The low area and power consumptions make the processor an extremely scalable device which would work well in closed loop neural prosthesis for the treatment of neural diseases.