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Capacitor voltage balancing modulation approach for 5-Level DCC in inverter application

Autores

Nieto Cardona, Juan Diego , Montero-Robina, Pablo , GÓMEZ-ESTERN AGUILAR, FABIO

Publicación externa

No

Medio

Ieee Industrial Electronics Society

Alcance

Article

Naturaleza

Científica

Cuartil JCR

Cuartil SJR

Fecha de publicacion

01/01/2019

ISI

000522050605115

Abstract

This article presents a modulation strategy for 5-level diode clamped for inverter applications. This modulation aims to implement a strategy to use the nearest-level modulation (NLM) in 5-level diode-clamped converter (DCC) while dealing with the capacitor voltage issue. In this way, a commutation-saving modulation approach is proposed. To achieve such purpose, the model of the converter is deeply analyzed and an strategy to select the common component is proposed. Such strategy is calculated offline and the solution is stored as a multidimensional array to be used during online operation. The effectiveness and good performance of the strategy is therefore validated by simulation results.

Palabras clave

Neutral-point clamped (NPC); pulse-width modulation (PWM); power electronics; inverter

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