| Title |
Capacitor voltage balancing modulation approach for 5-Level DCC in inverter application |
| Authors |
Nieto Cardona, Juan Diego , Montero-Robina, Pablo , GÓMEZ-ESTERN AGUILAR, FABIO |
| External publication |
No |
| Means |
Ieee Industrial Electronics Society |
| Scope |
Article |
| Nature |
Científica |
| Publication date |
01/01/2019 |
| ISI |
000522050605115 |
| Abstract |
This article presents a modulation strategy for 5-level diode clamped\n for inverter applications. This modulation aims to implement a strategy\n to use the nearest-level modulation (NLM) in 5-level diode-clamped\n converter (DCC) while dealing with the capacitor voltage issue. In this\n way, a commutation-saving modulation approach is proposed. To achieve\n such purpose, the model of the converter is deeply analyzed and an\n strategy to select the common component is proposed. Such strategy is\n calculated offline and the solution is stored as a multidimensional\n array to be used during online operation. The effectiveness and good\n performance of the strategy is therefore validated by simulation\n results. |
| Keywords |
Neutral-point clamped (NPC); pulse-width modulation (PWM); power electronics; inverter |
| Universidad Loyola members |
|
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